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| INTEGRATED CIRCUITS DATA SHEET TEA1533P; TEA1533AP GreenChipTMII SMPS control IC Product specification Supersedes data of 2002 May 31 2002 Aug 23 Philips Semiconductors Product specification GreenChipTMII SMPS control IC FEATURES Distinctive features * Universal mains supply operation (70 to 276 V AC) * High level of integration, giving a very low external component count. Green features * Valley or zero voltage switching for minimum switching losses * Efficient quasi-resonant operation at high power levels * Frequency reduction at low power standby for improved system efficiency (<3 W) * Cycle skipping mode at very low loads. Pi <300 mW at no-load operation for a typical adapter application * On-chip start-up current source. Protection features * Safe restart mode for system fault conditions * Continuous mode protection by means of demagnetization detection (zero switch-on current) * Accurate and adjustable overvoltage protection (latched in TEA1533P, safe restart in TEA1533AP) * Short winding protection * Undervoltage protection (foldback during overload) * Overtemperature protection (latched in TEA1533P, safe restart in TEA1533AP) * Low and adjustable overcurrent protection trip level * Soft (re)start * Mains voltage-dependent operation enabling level. APPLICATIONS TEA1533P; TEA1533AP Besides typical application areas, i.e. adapters and chargers, the device can be used in TV and monitor supplies and all applications that demand an efficient and cost-effective solution up to 250 W. 1 2 3 4 8 7 6 5 TEA1533P TEA1533AP MGU505 Fig.1 Basic application diagram. 2002 Aug 23 2 Philips Semiconductors Product specification GreenChipTMII SMPS control IC GENERAL DESCRIPTION is the second generation of green The Switched Mode Power Supply (SMPS) control ICs operating directly from the rectified universal mains. A high level of integration leads to a cost effective power supply with a very low number of external components. The special built-in green functions allow the efficiency to be optimum at all power levels. This holds for quasi-resonant operation at high power levels, as well as fixed frequency operation with valley switching at medium power levels. At low power (standby) levels, the system operates at a reduced frequency and with valley detection. (1) GreenChip is a trademark of Koninklijke Philips Electronics N.V. TEA1533P; TEA1533AP The proprietary high voltage BCD800 process makes direct start-up possible from the rectified mains voltage in an effective and green way. A second low voltage BICMOS IC is used for accurate, high-speed protection functions and control. Highly efficient and reliable supplies can easily be designed using the GreenChipII control IC. GreenChipTM(1)II ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TEA1533P TEA1533AP DIP8 DESCRIPTION plastic dual in-line package; 8 leads (300 mil) VERSION SOT97-1 2002 Aug 23 3 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... book, full pagewidth 2002 Aug 23 4 BLOCK DIAGRAM Philips Semiconductors GreenChipTMII SMPS control IC VCC 1 SUPPLY MANAGEMENT START-UP CURRENT SOURCE OCP Iprot(DEM) VALLEY clamp 8 DRAIN internal supply 2 S1 M-level UVLO start DEMAG SHORT PROTECTION 7 4 HVS n.c. DEM GND VOLTAGE CONTROLLED OSCILLATOR LOGIC 100 mV 50 mV FREQUENCY CONTROL UP/DOWN COUNTER OVERVOLTAGE PROTECTION Iprot(CTRL) CTRL 3 -1 POWER-ON RESET LOGIC DRIVER Iss LEB 6 DRIVER S Q blank soft start S2 0.5 V 2.5 V burst detect OVERTEMPERATURE PROTECTION UVLO R Q 5 OCP Isense S VCC < 4.5 V or UVLO (TEA1533AP) Q TEA1533P; TEA1533AP R Q TEA1533P TEA1533AP MAXIMUM ON-TIME PROTECTION short winding 0.88 V OVERPOWER PROTECTION MGU506 Product specification Fig.2 Block diagram. Philips Semiconductors Product specification GreenChipTMII SMPS control IC PINNING SYMBOL PIN VCC GND CTRL DEM 1 2 3 4 ground control input input from auxiliary winding for demagnetization timing, overvoltage and overpower protection programmable current sense input gate driver output high voltage safety spacer, not connected drain of external MOS switch, input for start-up current and valley sensing 25 f handbook, halfpage (kHz) TEA1533P; TEA1533AP FUNCTIONAL DESCRIPTION DESCRIPTION supply voltage The TEA1533 is the controller of a compact flyback converter, and is situated at the primary side. An auxiliary winding of the transformer provides demagnetization detection and powers the IC after start-up. The TEA1533 can operate in multi modes (see Fig.4). Isense DRIVER HVS DRAIN 5 6 7 8 MGU508 VCO 175 fixed quasi resonant P (W) Fig.4 Multi modes operation. handbook, halfpage VCC 1 GND 2 8 DRAIN 7 HVS TEA1533P TEA1533AP 6 DRIVER CTRL 3 DEM 4 MGU507 5 Isense The next converter stroke is started only after demagnetization of the transformer current (zero current switching), while the drain voltage has reached the lowest voltage to prevent switching losses (green function). The primary resonant circuit of the primary inductance and drain capacitor ensures this quasi-resonant operation. The design can be optimized in such a way that zero voltage switching can be reached over almost the universal mains range. To prevent very high frequency operation at lower loads, the quasi-resonant operation changes smoothly in fixed frequency PWM control. At very low power (standby) levels, the frequency is controlled down, via the VCO, to a minimum frequency of approximately 25 kHz. Start-up, mains enabling operation level and undervoltage lock-out Initially, the IC is self supplying from the rectified mains voltage via pin DRAIN (see Figs 11 and 12). Supply capacitor CVCC is charged by the internal start-up current source to approximately 4 V or higher, depending on the voltage on pin DRAIN. Fig.3 Pin configuration. 2002 Aug 23 5 Philips Semiconductors Product specification GreenChipTMII SMPS control IC Once the drain voltage exceeds the M-level (mains-dependent operation-enabling level), the start-up current source will continue charging capacitor CVCC (switch S1 will be opened); see Fig.2. The IC will activate the converter as soon as the voltage on pin VCC passes the VCC(start) level. The IC supply is taken over by the auxiliary winding as soon as the output voltage reaches its intended level and the IC supply from the mains voltage is subsequently stopped for high efficiency operation (green function). The moment the voltage on pin VCC drops below the undervoltage lock-out level, the IC stops switching and enters a safe restart from the rectified mains voltage. Inhibiting the auxiliary supply by external means causes the converter to operate in a stable, well defined burst mode. Supply management All (internal) reference voltages are derived from a temperature compensated, on-chip band gap circuit. Current mode control Current mode control is used for its good line regulation behaviour. The `on-time' is controlled by the internally inverted control voltage, which is compared with the primary current information. The primary current is sensed across an external resistor. The driver output is latched in the logic, preventing multiple switch-on. The internal control voltage is inversely proportional to the external control pin voltage, with an offset of 1.5 V. This means that a voltage range from 1 to 1.5 V on pin CTRL will result in an internal control voltage range from 0.5 to 0 V (a high external control voltage results in a low duty cycle). Oscillator The maximum fixed frequency of the oscillator is set by an internal current source and capacitor. The maximum frequency is reduced once the control voltage enters the VCO control window. Then, the maximum frequency changes linearly with the control voltage until the minimum frequency is reached (see Figs 5 and 6). 25 handbook, halfpage TEA1533P; TEA1533AP sense(max) handbook, halfpage V MGU233 0.52 V 1V (typ) 1.5 V (typ) VCTRL Fig.5 Vsense(max) voltage as function of VCTRL. f (kHz) 175 MGU509 175 kHz VCO2 level VCO1 level Vsense(max) (V) Fig.6 VCO frequency as function of Vsense(max) Cycle skipping At very low power levels, a cycle skipping mode will be activated. A high control voltage will reduce the switching frequency to a minimum of 25 kHz. If the voltage on the control pin is raised even more, switch-on of the external power MOSFET will be inhibited until the voltage on the control pin has dropped to a lower value again (see Fig.7). For system accuracy, it is not the absolute voltage on the control pin that will trigger the cycle skipping mode, but a signal derived from the internal VCO will be used. Remark 1: If the no-load requirement of the system is such that the output voltage can be regulated to its intended level at a switching frequency of 25 kHz or above, the cycle skipping mode will not be activated. Remark 2: As switching will stop when the voltage on the control pin is raised above a certain level, the burst mode has to be activated by a microcontroller or any other circuit sending a 30 s, 16 mA pulse to the control input (pin CTRL) of the IC. 2002 Aug 23 6 Philips Semiconductors Product specification GreenChipTMII SMPS control IC TEA1533P; TEA1533AP handbook, full pagewidth fosc current comparator DRIVER DRIVER Isense fmin dV2 Vx V I 150 mV OSCILLATOR 1 cycle skipping dV1 150 Vx (mV) 1.5 V - VCTRL CTRL fmax X2 0 Vx (mV) MGU510 The voltage levels dV1 and dV2 are fixed in the IC to 50 mV (typical) and 18 mV (typical) respectively. Fig.7 The cycle skipping circuitry. Demagnetization The system will be in discontinuous conduction mode all the time. The oscillator will not start a new primary stroke until the secondary stroke has ended. Demagnetization features a cycle-by-cycle output short-circuit protection by immediately lowering the frequency (longer off-time), thereby reducing the power level. Demagnetization recognition is suppressed during the first tsuppr time. This suppression may be necessary in applications where the transformer has a large leakage inductance, at low output voltages and at start-up. If pin DEM is open-circuit or not connected, a fault condition is assumed and the converter will stop operating immediately. Operation will recommence as soon as the fault condition is removed. If pin DEM is shorted to ground, again a fault condition is assumed and the converter will stop operating after the first stroke. The converter will subsequently enter the safe restart mode. This situation will persist until the short-circuit is removed. Minimum and maximum `on-time' The minimum `on-time' of the SMPS is determined by the Leading Edge Blanking (LEB) time. The IC limits the `on-time' to 50 s. When the system desires an `on-time' longer than 50 s, a fault condition is assumed (e.g. removed Ci in Fig.11), the IC will stop switching and enter the safe restart mode. 2002 Aug 23 7 Philips Semiconductors Product specification GreenChipTMII SMPS control IC OverVoltage Protection (OVP) An OVP mode is implemented in the GreenChip series. This works for the TEA1533 by sensing the auxiliary voltage via the current flowing into pin DEM during the secondary stroke. The auxiliary winding voltage is a well-defined replica of the output voltage. Any voltage spikes are averaged by an internal filter. If the output voltage exceeds the OVP trip level, an internal counter starts counting subsequent OVP events. The counter has been added to prevent incorrect OVP detections which might occur during ESD or lightning events. If the output voltage exceeds the OVP trip level a few times and not again in a subsequent cycle, the internal counter will count down with twice the speed compared with counting-up. However, when typical 10 cycles of subsequent OVP events are detected, the IC assumes a true OVP and the OVP circuit switches the power MOSFET off. Next, the controller waits until the UVLO level is reached on pin VCC. When VCC drops to UVLO, capacitor CVCC will be recharged to the Vstart level. Regarding the TEA1533P, this IC will not start switching again. Subsequently, VCC will drop again to the UVLO level, etc. Operation only recommences when the VCC voltage drops below a level of approximately 4.5 V (practically when Vmains has been disconnected for a short period). Regarding the TEA1533AP, switching starts again (safe restart mode) when the Vstart level is reached. This process is repeated as long as the OVP condition exists. The output voltage Vo(OVP) at which the OVP function trips, can be set by the demagnetization resistor, RDEM: V o ( OVP ) = Ns ----------- { I (OVP)(DEM) x R DEM + V clamp(DEM)(pos) } N aux where Ns is the number of secondary turns and Naux is the number of auxiliary turns of the transformer. Current I(OVP)(DEM) is internally trimmed. The value of RDEM can be adjusted to the turns ratio of the transformer, thus making an accurate OVP possible. Valley switching TEA1533P; TEA1533AP A new cycle starts when the power MOSFET is switched on (see Fig.8). After the `on-time' (which is determined by the `sense' voltage and the internal control voltage), the switch is opened and the secondary stroke starts. After the secondary stroke, the drain voltage shows an oscillation 1 with a frequency of approximately ---------------------------------------------2 x x ( Lp x Cd ) where Lp is the primary self inductance of the transformer and Cd is the capacitance on the drain node. As soon as the oscillator voltage is high again and the secondary stroke has ended, the circuit waits for the lowest drain voltage before starting a new primary stroke. This method is called valley detection. Figure 8 shows the drain voltage together with the valley signal, the signal indicating the secondary stroke and the oscillator signal. In an optimum design, the reflected secondary voltage on the primary side will force the drain voltage to zero. Thus, zero voltage switching is very possible, preventing large 1 2 capacitive switching losses P = -- x C x V x f and 2 allowing high frequency operation, which results in small and cost effective inductors. 2002 Aug 23 8 Philips Semiconductors Product specification GreenChipTMII SMPS control IC TEA1533P; TEA1533AP handbook, full pagewidth primary stroke secondary stroke secondary ringing drain valley secondary stroke B A oscillator MGU235 A: Start of new cycle at lowest drain voltage. B: Start of new cycle in a classical PWM system at high drain voltage. Fig.8 Signals for valley switching. OverCurrent Protection (OCP) The cycle-by-cycle peak drain current limit circuit uses the external source resistor to measure the current accurately. This allows optimum size determination of the transformer core (cost issue). The circuit is activated after the leading edge blanking time, tleb. The OCP circuit limits the `sense' voltage to an internal level. OverPower Protection (OPP) During the primary stroke, the rectified mains input voltage is measured by sensing the current drawn from pin DEM. This current is dependent on the mains voltage, according V aux N x V mains to the following formula: I DEM -------------- -------------------------R DEM R DEM N aux where: N = ----------Np The current information is used to adjust the peak drain current, which is measured via pin Isense. The internal compensation is such that an almost mains independent maximum output power can be realized. The OPP curve is given in Fig.9. 2002 Aug 23 9 Philips Semiconductors Product specification GreenChipTMII SMPS control IC TEA1533P; TEA1533AP Control pin protection handbook, halfpage MGU236 Vsense(max) 0.52 V (typ) If pin CTRL is open-circuit or not connected, a fault condition is assumed and the converter will stop switching. Operation will recommence as soon as the fault condition is removed. Burst mode standby 0.3 V (typ) -100 A (typ) IDEM -24 A (typ) Pin CTRL is also used to implement the burst mode standby. In burst mode standby, the power supply enters a special low dissipation state. Figure 11 shows a flyback converter using the burst mode standby function. The system enters burst mode standby when the microcontroller activates NPN transistor T1 on the secondary side. When the voltage on Cmicro exceeds a certain voltage measured by the microcontroller, the opto-coupler is activated by T1, sending a large current signal to pin CTRL. In response to this signal, the IC stops switching and enters a `hiccup' mode. This burst activation signal should be present for longer than the `burst blank' period (typically 30 s): the blanking time prevents false burst triggering due to spikes. Figure 12 shows the burst mode standby signals. The hiccup mode during burst mode standby operation does not differ from the hiccup mode at safe restart during a system fault condition (e.g. output short-circuit). The power is reduced during soft restart mode. Burst mode standby operation continues until the microcontroller stops activating transistor T1. The system then enters the start-up sequence and begins normal switching behaviour. V th I burstmode = --------------- + I th(on) R CTRL Fig.9 OPP correction curve. Short winding protection After the leading edge blanking time, the short winding protection circuit is activated. If the `sense' voltage exceeds the short winding protection voltage Vswp, the converter will stop switching. Once VCC drops below the UVLO level, capacitor CVCC will be recharged and the supply will restart again. This cycle will be repeated until the short-circuit is removed (safe restart mode). The short winding protection will also protect in case of a secondary diode short-circuit. OverTemperature Protection (OTP) An accurate temperature protection is provided in the circuit. When the junction temperature exceeds the thermal shutdown temperature, the IC will stop switching. When VCC drops to UVLO, capacitor CVCC will be recharged to the Vstart level. Regarding the TEA1533P, this IC will not start switching again. Subsequently, VCC will drop again to the UVLO level, etc. Operation only recommences when the VCC voltage drops below a level of approximately 4.5 V (practically when the Vmains has been disconnected for a short period). Regarding the TEA1533AP, when the Vstart level is reached, switching starts again (safe restart mode). This process is repeated as long as the OTP condition exists. 2002 Aug 23 10 Philips Semiconductors Product specification GreenChipTMII SMPS control IC Soft start-up To prevent transformer rattle during hiccup, the transformer peak current is slowly increased by the soft start function. This can be achieved by inserting a resistor and a capacitor between pin Isense and the sense resistor (see Fig.10). An internal current source charges the capacitor to V = ISS x RSS, with a maximum of approximately 0.5 V. The start level and the time constant of the increasing primary current level can be adjusted externally by changing the values of RSS and CSS. V ocp - ( I SS x R SS ) I primary(max) = ---------------------------------------------R sense = R SS x C SS The charging current ISS will flow as long as the voltage on pin Isense is below approximately 0.5 V. If the voltage on pin Isense exceeds 0.5 V, the soft start current source will start limiting the current ISS. At the VCC(start) level, the ISS current source is completely switched off. Since the soft start current ISS is subtracted from pin VCC charging current, the RSS value will affect the VCC charging current level by a maximum of 60 A (typical value). Driver TEA1533P; TEA1533AP The driver circuit to the gate of the power MOSFET has a current sourcing capability of 170 mA typical and a current sink capability of 700 mA typical. This permits fast turn-on and turn-off of the power MOSFET for efficient operation. A low driver source current has been chosen to limit the V/t at switch-on. This reduces Electro Magnetic Interference (EMI) and also limits the current spikes across Rsense. handbook, halfpage ISS 0.5 V start-up 5 Isense RSS Vocp CSS Rsense MGU237 Fig.10 Soft start. 2002 Aug 23 11 Philips Semiconductors Product specification GreenChipTMII SMPS control IC LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); note 1. SYMBOL Voltages VCC VCTRL VDEM Vsense VDRAIN Currents ICTRL IDEM Isense IDRIVER IDRAIN General Ptot Tstg Tj Vesd total power dissipation storage temperature operating junction temperature electrostatic discharge voltage pins 1 to 6 pin DRAIN any pin Notes HBM class 1; note 2 HBM class 1; note 2 note 3 Tamb < 70 C current on pin CTRL current on pin DEM current on pin Isense current on pin DRIVER current on pin DRAIN d < 10% d < 10% supply voltage voltage on pin CTRL voltage on pin DEM voltage on pin Isense voltage on pin DRAIN current limited current limited continuous PARAMETER CONDITIONS TEA1533P; TEA1533AP MIN. -0.4 -0.4 -0.4 -0.4 -0.4 - -250 -1 -0.8 - - -55 -20 - - - MAX. UNIT +20 +5 - - +650 V V V V V 50 +250 +10 +2 5 mA A mA A mA 0.75 +150 +145 2000 1500 400 W C C V V V 1. All voltages are measured with respect to ground; positive currents flow into the IC; pin VCC may not be current driven. The voltage ratings are valid provided other ratings are not violated; current ratings are valid provided the maximum power rating is not violated. 2. Equivalent to discharging a 100 pF capacitor through a 1.5 k resistor. 3. Equivalent to discharging a 200 pF capacitor through a 0.75 H coil and a 10 resistor. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) Note 1. With pin GND connected to sufficient copper area on the printed-circuit board. QUALITY SPECIFICATION In accordance with `SNW-FQ-611-D'. PARAMETER CONDITIONS VALUE 100 UNIT K/W thermal resistance from junction to ambient in free air; note 1 2002 Aug 23 12 Philips Semiconductors Product specification GreenChipTMII SMPS control IC TEA1533P; TEA1533AP CHARACTERISTICS Tamb = 25 C; VCC = 15 V; all voltages are measured with respect to ground; currents are positive when flowing into the IC; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Start-up current source (pin DRAIN) IDRAIN supply current drawn from pin DRAIN breakdown voltage mains-dependent operation enabling level VCC = 0 V; VDRAIN > 100 V with auxiliary supply; VDRAIN > 100 V 1.0 - 650 60 1.2 100 - - 1.4 300 - 100 mA A V V BVDSS M-level Supply voltage management (pin VCC) VCC(start) VCC(UVLO) VCC(hys) ICC(h) ICC(l) ICC(restart) ICC(oper) ICC(burstmode) Vth(DEM) Iprot(DEM) start-up voltage on VCC undervoltage lock-out on VCC hysteresis voltage on VCC pin VCC charging current, high pin VCC charging current, low pin VCC restart current supply current under normal operation supply current while not switching VCC(start) - VCC(UVLO) VDRAIN > 100 V; VCC < 3 V VDRAIN > 100 V; 3 V < VCC < VCC(UVLO) 10.3 8.1 2.0 -1.2 -1.2 11 8.7 2.3 -1 -0.75 -550 1.3 0.85 11.7 9.3 2.6 -0.8 -0.45 -450 1.5 - 150 -10 -0.05 0.9 1.9 V V V mA mA A mA mA VDRAIN > 100 V; -650 VCC(UVLO) < VCC < VCC(start) no load on pin DRIVER 1.1 - 50 VDEM = 50 mV IDEM = -150 A IDEM = 250 A -50(1) -0.5 0.5 1.1 Demagnetization management (pin DEM) demagnetization comparator threshold voltage on pin DEM protection current on pin DEM 100 - -0.25 0.7 1.5 mV nA V V s Vclamp(DEM)(neg) negative clamp voltage on pin DEM Vclamp(DEM)(pos) positive clamp voltage on pin DEM tsuppr suppression of transformer ringing at start of secondary stroke Pulse width modulator ton(min) ton(max) Oscillator fosc(l) fosc(h) Vvco(start) oscillator low fixed frequency oscillator high fixed frequency peak voltage on pin Isense, where frequency reduction starts VCTRL > 1.5 V VCTRL < 1 V see Figs 6 and 7 20 145 - 25 175 VCO1 30 205 - kHz kHz mV minimum on-time maximum on-time latched - 40 tleb 50 - 60 ns s 2002 Aug 23 13 Philips Semiconductors Product specification GreenChipTMII SMPS control IC TEA1533P; TEA1533AP SYMBOL Vvco(max) PARAMETER peak voltage on pin Isense, where the frequency is equal to fosc(l) minimum voltage on pin CTRL for maximum duty cycle maximum voltage on pin CTRL for minimum duty cycle protection current on pin CTRL CONDITIONS MIN. - TYP. MAX. UNIT mV VCO1 - 25 - Duty cycle control (pin CTRL) VCTRL(min) VCTRL(max) Iprot(CTRL) Vth(burst)(on) Ith(burst)(on) Ith(burst)(off) t(burst-blank) V/tvalley tvalley-swon - - VCTRL = 1.5 V Iburst = 6 mA -1 (1) 3.3 16 - 25 -85 - 1.0 1.5 -0.8 3.8 - - 30 - 150(1) - - -0.5 4.3 - 6 35 +85 - V V A V mA mA s V/s ns Burst mode standby (pin CTRL) burst mode standby active threshold voltage burst mode standby active current burst mode standby inactive current burst mode standby blanking time Valley switch (pin DRAIN) valley recognition voltage change delay from valley recognition to switch-on V/t = 0.1 V/s V/t = 0.5 V/s Overcurrent and short winding protection (pin Isense) Vsense(max) tPD Vswp tleb ISS IOVP(DEM) maximum source voltage OCP propagating delay from detecting Vsense(max) to switch-off short winding protection voltage blanking time for current and short winding protection soft start current Vsense < 0.5 V set by resistor RDEM, see Section "OverVoltage Protection (OVP)" 0.48 - 0.83 300 45 0.52 140 0.88 370 60 0.56 185 0.96 440 75 V ns V ns A A Overvoltage protection (pin DEM) OVP level on pin DEM 54 60 66 Overpower protection (pin DEM) IOPP(DEM) OPP current on pin DEM to start OPP correction OPP current on pin DEM, where maximum source voltage is limited to 0.3 V set by resistor RDEM, see Section "OverPower Protection (OPP)" - -24 - A IOPP50%(DEM) - -100 - A 2002 Aug 23 14 Philips Semiconductors Product specification GreenChipTMII SMPS control IC TEA1533P; TEA1533AP SYMBOL Driver (pin DRIVER) Isource Isink PARAMETER CONDITIONS MIN. TYP. -170 300 700 11.5 MAX. -88 - - 12 UNIT source current capability of driver sink current capability of driver VCC = 9.5 V; VDRIVER = 2 V - VCC= 9.5 V; VDRIVER = 2 V VCC = 9.5 V; VDRIVER = 9.5 V - 400 - mA mA mA V Vo(max) maximum output voltage of the driver VCC > 12 V Temperature protection Tprot(max) Tprot(hys) Note 1. Guaranteed by design. maximum temperature protection level hysteresis for the temperature protection level 130 - 140 8(1) 150 - C C 2002 Aug 23 15 Philips Semiconductors Product specification GreenChipTMII SMPS control IC APPLICATION INFORMATION TEA1533P; TEA1533AP A converter with the TEA1533 consists of an input filter, a transformer with a third winding (auxiliary), and an output stage with a feedback circuit. Capacitor CVCC (at pin VCC) buffers the supply voltage of the IC, which is powered via the high voltage rectified mains during start-up and via the auxiliary winding during operation. A sense resistor converts the primary current into a voltage at pin Isense. The value of this sense resistor defines the maximum primary peak current. mains handbook, full pagewidth Vi Ci Np VCC CVCC GND CTRL DEM 1 2 3 4 8 DRAIN 7 6 5 HVS n.c. power MOSFET RSS CSS RDEM MICROCONTROLLER standby pulse Rsense Dmicro VC Ns Co Do Vo V CCTRL RCTRL TEA1533P TEA1533AP DRIVER Isense Naux Cmicro Rreg1 Rreg2 T1 MGU511 Fig.11 Flyback configuration with secondary sensing using the burst mode standby. 2002 Aug 23 16 Philips Semiconductors Product specification GreenChipTMII SMPS control IC TEA1533P; TEA1533AP handbook, full pagewidth Vi VD (power MOSFET) Vi Vo VCC Vgate M-level burst mode VC start-up sequence normal operation overvoltage protection (TEA1533AP) output short-circuit burst mode standby normal operation MGU512 Fig.12 Typical waveforms. 2002 Aug 23 17 Philips Semiconductors Product specification GreenChipTMII SMPS control IC PACKAGE OUTLINE DIP8: plastic dual in-line package; 8 leads (300 mil) TEA1533P; TEA1533AP SOT97-1 D seating plane ME A2 A L A1 c Z e b1 wM (e 1) b2 5 MH b 8 pin 1 index E 1 4 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.14 0.068 0.045 b1 0.53 0.38 0.021 0.015 b2 1.07 0.89 0.042 0.035 c 0.36 0.23 0.014 0.009 D (1) 9.8 9.2 0.39 0.36 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 1.15 0.045 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT97-1 REFERENCES IEC 050G01 JEDEC MO-001 EIAJ SC-504-8 EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 2002 Aug 23 18 Philips Semiconductors Product specification GreenChipTMII SMPS control IC SOLDERING Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. TEA1533P; TEA1533AP The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. suitable suitable(1) WAVE 2002 Aug 23 19 Philips Semiconductors Product specification GreenChipTMII SMPS control IC DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development TEA1533P; TEA1533AP DEFINITIONS This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Preliminary data Qualification Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2002 Aug 23 20 Philips Semiconductors Product specification GreenChipTMII SMPS control IC NOTES TEA1533P; TEA1533AP 2002 Aug 23 21 Philips Semiconductors Product specification GreenChipTMII SMPS control IC NOTES TEA1533P; TEA1533AP 2002 Aug 23 22 Philips Semiconductors Product specification GreenChipTMII SMPS control IC NOTES TEA1533P; TEA1533AP 2002 Aug 23 23 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. (c) Koninklijke Philips Electronics N.V. 2002 SCA74 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613502/02/pp24 Date of release: 2002 Aug 23 Document order number: 9397 750 10261 |
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